The Anritsu MP1763B is a high-performance 12.5 GHz Pulse Pattern Generator (PPG) designed for testing high-speed digital systems, optical modules, and telecom/datacom networks. It provides accurate, low-jitter clock and data outputs over a frequency range of 50 MHz to 12.5 GHz, supporting both PRBS and large user-defined word patterns.
Specifications
General
| Parameter | Value |
|---|---|
| Interfaces | GP-IB (IEEE-488.2), 3.5-inch Floppy Disk Drive (2HD/2DD) |
| Display | 6.4-inch color TFT LCD |
Physical
| Parameter | Value |
|---|---|
| Power Supply | 100 to 120 VAC / 200 to 240 VAC, 47.5 to 63 Hz, <= 450 VA |
| Operating Temperature | 0 to +40 °C |
| Dimensions (W×H×D) | 426 x 266 x 451 mm |
| Weight | 27 |
Timing and Clock Characteristics
| Parameter | Value |
|---|---|
| Data Rate Range | 50 MHz to 12.5 GHz |
| External Clock Input Frequency | 50 MHz to 12.5 GHz |
| External Clock Input Amplitude | 0.5 Vp-p to 2.0 Vp-p |
| External Clock Input Impedance | 50 ohms (AC coupled) |
Pattern and Data Generation
| Parameter | Value |
|---|---|
| Pattern Types | PRBS, Word (User-defined), Alternate |
| PRBS Polynomial Sequences | 2^7-1, 2^9-1, 2^11-1, 2^15-1, 2^23-1, 2^31-1 |
| User-Defined Pattern Memory Depth | 1 to 8,388,608 bits |
| Alternate Pattern Memory Depth | 1 to 4,194,304 bits x 2 |
Pulse Output Performance
| Parameter | Value |
|---|---|
| Number of Data Channels | 1 (Complementary outputs: DATA, /DATA) |
| Number of Clock Channels | 3 (CLK1, CLK2, /CLK2) |
| Output Amplitude Range | 0.25 Vp-p to 2.0 Vp-p |
| Output Amplitude Resolution | 10 mV |
| Offset Voltage Range | -2.0 V to +2.0 V (referenced to GND) |
| Offset Voltage Resolution | 10 mV |
| Rise/Fall Time (20% to 80%) | <= 30 ps (typically 25 ps) |
| Output Connection Type | K-connector (female), 50 ohms |
Channel Delay and Synchronization
| Parameter | Value |
|---|---|
| Inter-channel Delay Range | -500 ps to +500 ps (CLK2 output) |
| Inter-channel Delay Resolution | 1 ps |
| Pattern Sync Output Amplitude | >= 0.5 Vp-p (into 50 ohms) |
| Clock Sync Output Division Ratio | 1/8 clock or 1/64 clock (selectable) |
System Control and Connectivity
| Parameter | Value |
|---|---|
| Internal State Storage Capacity | Up to 10 panel setup configurations |
Environmental and Safety Compliance
| Parameter | Value |
|---|---|
| Storage Temperature Range | -20°C to +60°C |
Output Characteristics
| Parameter | Value |
|---|---|
| Cross-point adjustment range | 30% to 70% (in 1% steps) |
| Output configuration | Complementary DATA and CLOCK outputs |
Pattern Generation & Control
| Parameter | Value |
|---|---|
| Error insertion modes | Single, or internal rate of 10^-3 to 10^-9, or external trigger |
| Mark ratio pattern selections | 1/8, 2/8, 3/8, 4/8, 5/8, 6/8, 7/8, 8/8, 0/8 |
Waveform Characteristics
| Parameter | Value |
|---|---|
| Output Jitter | ≤ 15 ps p-p |
| Waveform Distortion | ≤ 10% |
| Output Impedance | 50 Ω |
Patterns
| Parameter | Value |
|---|---|
| Zero Substitution Patterns | 2^7, 2^9, 2^11, 2^15, 2^23 |
Technology
Silicon-Germanium / high-speed GaAs digital IC technology
Applications
High-speed telecom, optical transponder testing, BERT transmitter