The Tektronix AWG7101 is a high-performance arbitrary waveform generator (AWG) in the AWG7000 Series, delivering high-speed signal generation up to 10 GS/s (and up to 20 GS/s in interleaved mode). Running on an open Windows XP platform, it combines exceptional DAC resolution, low jitter, and deep waveform memory to tackle advanced digital, RF, and serial data generation challenges. It offers up to 64 Mpoint record length and real-time sequencing to create complex, infinite waveform loops and branches.
Specifications
General
| Parameter | Value |
|---|---|
| Interfaces | LAN (10/100/1000Base-T), GPIB, USB 2.0, VGA, DVI-D, PS/2 |
| Display | 10.4-inch TFT color touchscreen LCD, 1024 × 768 XGA |
Physical
| Parameter | Value |
|---|---|
| Power Supply | 100 to 240 V AC, 47 to 63 Hz, max 450 W |
| Operating Temperature | 10 °C to 40 °C |
| Dimensions (W×H×D) | 429 mm × 245 mm × 462 mm |
Channel Configuration & Core Architecture
| Parameter | Value |
|---|---|
| Number of Channels | 1 |
| DAC Resolution | 10-bit (no markers) or 8-bit (with 2 markers) |
| Maximum Sample Rate | 10 GS/s (up to 20 GS/s interleaved with Option 06) |
| Minimum Sample Rate | 10 MS/s |
Arbitrary Waveform Performance
| Parameter | Value |
|---|---|
| Standard Waveform Memory Depth | 32 Mpoints |
| Maximum Waveform Memory Depth | 64 Mpoints (with Option 01) |
| Minimum Waveform Segment Length | 240 points |
| Waveform Granularity | 1 point |
| Total Jitter | 20 ps p-p (typical, at 10-12 BER) |
Output Characteristics
| Parameter | Value |
|---|---|
| Output Impedance | 50 Ω |
| Output Configuration | Differential or Single-ended |
| Number of Marker Outputs | 2 (variable level) |
Sequencing & Modulation
| Parameter | Value |
|---|---|
| Real-time Sequencing | Supported (loops, jumps, and conditional branches) |
System Connectivity & Control
| Parameter | Value |
|---|---|
| Operating System | Windows XP Professional |
| Built-in Storage | Removable Hard Disk Drive |
| Optical Drive | Built-in DVD-RW |
Power & Environmental Specifications
| Parameter | Value |
|---|---|
| Storage Temperature Range | -20 °C to +60 °C |
| Operating Humidity Range | 5% to 80% RH (non-condensing) |
| Operating Altitude | Up to 3,000 m (10,000 ft) |
Physical Characteristics & Compliance
| Parameter | Value |
|---|---|
| Form Factor | Benchtop |
Analog Output
| Parameter | Value |
|---|---|
| Analog Bandwidth (Normal Mode) | 3.5 GHz (-3 dB) |
| Analog Bandwidth (Direct Mode) | 5.0 GHz (-3 dB) |
| Output Amplitude Range (Normal Mode) | 50 mVp-p to 1.0 Vp-p (single-ended), 50 mVp-p to 2.0 Vp-p (differential) into 50 Ω |
| Output Amplitude Range (Direct Mode) | 50 mVp-p to 500 mVp-p (single-ended), 50 mVp-p to 1.0 Vp-p (differential) into 50 Ω |
| DC Offset Range (Normal Mode) | -0.5 V to +0.5 V (into 50 Ω) |
| Spurious Free Dynamic Range (SFDR) | -54 dBc @ 10 MHz, -45 dBc @ 1 GHz (10 GS/s, typical) |
| Effective Number of Bits (ENOB) | 5.4 bits @ 1 GHz (10 GS/s, typical) |
Clock & Reference
| Parameter | Value |
|---|---|
| Internal Clock Accuracy | ±1 ppm |
| External Clock Input Frequency | 5.0 GHz to 10.0 GHz |
| External Clock Input Amplitude | 0.4 Vp-p to 1.0 Vp-p (50 Ω) |
| Reference Input Frequency | 10 MHz, 20 MHz, 100 MHz (within ±10 ppm) |
| Reference Input Amplitude | 0.2 Vp-p to 3.0 Vp-p (50 Ω) |
| Internal Clock Resolution | 8 digits |
| Reference Output Frequency | 10 MHz |
| Reference Output Amplitude | 1.2 Vp-p into 50 Ω |
| External Clock Input Impedance | 50 Ω, AC coupled |
Trigger & Markers
| Parameter | Value |
|---|---|
| Trigger Input Impedance | 50 Ω or 1 kΩ |
| Trigger Input Threshold Range | -2.0 V to +2.0 V (50 Ω), -5.0 V to +5.0 V (1 kΩ) |
| Trigger Delay to Analog Output | 55 ns (typical) |
| Marker Output Amplitude | High: -1.0 V to 2.4 V, Low: -2.2 V to 1.3 V (into 50 Ω) |
| Marker Output Rise/Fall Time | <150 ps (20% to 80%) |
Trigger
| Parameter | Value |
|---|---|
| Trigger Modes | Continuous, Triggered, Gated, Sequence |
| Trigger Input Minimum Pulse Width | 2 ns |
Marker Outputs
| Parameter | Value |
|---|---|
| Marker Output Impedance | 50 Ω |
| Marker Delay Resolution | 1 ps |
Sequencer
| Parameter | Value |
|---|---|
| Maximum Sequence Steps | 16,000 steps |
Applications
High-speed digital design verification, RF signal synthesis, semiconductor testing, and disk drive validation