The Tektronix DTG5078 is a highly versatile, modular Data Timing Generator from the DTG5000 Series. It functions as a hybrid of a data generator, pulse generator, and DC source. Featuring an 8-slot mainframe architecture, the DTG5078 supports a wide variety of plug-in output modules, supporting up to 64 independent channels in a single unit, with clock frequencies up to 750 MHz and high-accuracy delay control with 1 ps resolution.
Specifications
General
| Parameter | Value |
|---|---|
| Interfaces | GPIB (IEEE 488.2), LAN (10/100 Base-T), RS-232-C, USB, PS/2 Keyboard/Mouse, VGA, 3.5-inch Floppy Drive |
| Display | 10.4-inch color TFT LCD touch screen, 800 × 600 (SVGA) |
| Warm-up Time | 20 minutes |
Physical
| Parameter | Value |
|---|---|
| Power Supply | 100 to 240 V AC (±10%), 47 to 63 Hz, max 480 VA |
| Operating Temperature | 10 °C to 40 °C |
| Dimensions (W×H×D) | 435 mm × 218 mm × 565 mm |
| Weight | 17.0 kg |
Timing & Clock
| Parameter | Value |
|---|---|
| Maximum Data Rate | 750 Mb/s |
| Minimum Data Rate | 50 kb/s |
| Internal Clock Frequency Range | 50 kHz to 750 MHz |
| Frequency Resolution | 1 mHz or 8 digits |
| External Clock Input Frequency Range | 1 MHz to 750 MHz |
| Delay Resolution | 1 ps |
Mainframe Channel Capacity
| Parameter | Value |
|---|---|
| Number of Output Module Slots | 8 |
| Maximum Number of Channels | 64 channels (single mainframe), up to 96 channels (Master/Slave configuration) |
DC Outputs
| Parameter | Value |
|---|---|
| Number of DC Outputs | 8 |
| DC Output Voltage Range | -3.0 V to +5.0 V |
| DC Output Voltage Resolution | 10 mV |
| DC Output Maximum Current | 30 mA per channel |
Pattern & Sequence Generation
| Parameter | Value |
|---|---|
| Pattern Depth per Channel | 8 Mb (standard), 32 Mb (Option 01), 64 Mb (Option 02) |
| Maximum Sequence Steps | 8,000 |
| Sequence Loop Count Range | 1 to 65,536 or infinite |
| Sequence Subroutine Levels | 4 |
| Supported PRBS Polynomials | PRBS7, PRBS9, PRBS11, PRBS15, PRBS23, PRBS31 |
| Hard Disk Drive Capacity | 40 GB or more |
| Floppy Drive | 3.5-inch, 1.44 MB |
| CD-ROM Drive | Built-in CD-ROM |
Trigger & Synchronization
| Parameter | Value |
|---|---|
| Trigger Modes | Continuous, Gated, Triggered (Single), Burst |
| Trigger Input Impedance | 50 Ω or 1 kΩ |
| Trigger Input Threshold Range | -5.0 V to +5.0 V |
| Trigger Input Threshold Resolution | 0.1 V |
| Trigger Output Amplitude | 1.0 V to 2.5 V into 50 Ω |
| Trigger Output Impedance | 50 Ω |
| Reference Clock Input Frequency | 10 MHz (±100 ppm) |
| Reference Clock Input Impedance | 50 Ω |
| Reference Clock Output Frequency | 10 MHz |
| Reference Clock Output Amplitude | 1.2 Vp-p into 50 Ω |
| External Clock Input Impedance | 50 Ω |
| External Clock Input Amplitude | 0.4 Vp-p to 2.0 Vp-p |
System Control & Interfaces
| Parameter | Value |
|---|---|
| Operating System | Windows 2000 Professional or Windows XP |
| USB Ports | 5 ports |
| External Display Port | VGA (D-Sub 15-pin) |
Physical Characteristics
| Parameter | Value |
|---|---|
| Form Factor | Benchtop (5U rackmount optional) |
Environmental & Compliance
| Parameter | Value |
|---|---|
| Storage Temperature Range | -20 °C to +60 °C |
| Operating Humidity Range | 20% to 80% RH, non-condensing |
| Storage Humidity Range | 5% to 90% RH |
| Maximum Operating Altitude | 3,000 m (10,000 ft) |
| Maximum Storage Altitude | 12,000 m (40,000 ft) |
| Safety Certifications | UL61010B-1, CAN/CSA-C22.2 No. 1010.1, EN 61010-1 |
| Electromagnetic Compatibility | EN 61326 Class A, FCC Part 15 Subpart B Class A |
DTGM10 Module Specifications
| Parameter | Value |
|---|---|
| DTGM10 - Number of Channels | 8 |
| DTGM10 - Maximum Data Rate | 100 Mb/s |
| DTGM10 - Amplitude Range | 1.0 Vp-p to 5.5 Vp-p |
| DTGM10 - Output Impedance | 50 Ω |
| DTGM10 - Rise/Fall Time | < 3.0 ns (20% to 80%) |
| DTGM10 - Random Jitter | < 5 ps RMS (typical) |
| DTGM10 - Channel-to-Channel Skew | < 100 ps |
DTGM21 Module Specifications
| Parameter | Value |
|---|---|
| DTGM21 - Number of Channels | 4 |
| DTGM21 - Maximum Data Rate | 300 Mb/s |
| DTGM21 - Amplitude Range | 0.5 Vp-p to 6.5 Vp-p |
| DTGM21 - Output Impedance | 50 Ω |
| DTGM21 - Rise/Fall Time | < 1.6 ns (20% to 80%) |
| DTGM21 - Random Jitter | < 5 ps RMS (typical) |
| DTGM21 - Channel-to-Channel Skew | < 50 ps |
DTGM30/31/32 Module Specifications
| Parameter | Value |
|---|---|
| DTGM30/31/32 - Number of Channels | 2 |
| DTGM30/31/32 - Maximum Data Rate | 2.7 Gb/s (limited to 750 Mb/s in DTG5078) |
| DTGM30 - Amplitude Range | 0.1 Vp-p to 2.0 Vp-p |
| DTGM31 - Amplitude Range | 0.1 Vp-p to 2.0 Vp-p |
| DTGM32 - Amplitude Range | 0.1 Vp-p to 3.0 Vp-p |
| DTGM30/31/32 - Output Impedance | 50 Ω |
| DTGM30/31/32 - Rise/Fall Time | < 150 ps (20% to 80%) |
| DTGM30/31/32 - Random Jitter | < 3 ps RMS (typical) |
| DTGM30/31/32 - Deterministic Jitter | < 20 ps p-p (typical) |
| DTGM30/31/32 - Channel-to-Channel Skew | < 30 ps |
Timebase
| Parameter | Value |
|---|---|
| Internal Timebase Temperature Stability | ±1 ppm (10 °C to 40 °C) |
| Internal Timebase Aging | ±1 ppm per year |
Trigger
| Parameter | Value |
|---|---|
| Trigger Input Minimum Pulse Width | 15 ns |
| Trigger Input Jitter | <100 ps RMS (typical, standard); <40 ps RMS (typical, with Option 01) |
Options
| Parameter | Value |
|---|---|
| Option 01 Features | Low Jitter / High Resolution Delay |
Clock & Sync Outputs
| Parameter | Value |
|---|---|
| Clock Output Frequency Range | 50 kHz to 750 MHz |
| Clock Output Amplitude | 1.0 Vp-p (into 50 Ω) |
| Clock Output Impedance | 50 Ω |
| Clock Output Rise and Fall Time | < 150 ps (20% to 80%) |
| Clock Output Duty Cycle | 50% (typical) |
| Sync Output Amplitude | 1.0 Vp-p (into 50 Ω) |
| Sync Output Impedance | 50 Ω |
| Sync Output Rise and Fall Time | < 150 ps (20% to 80%) |
Environmental
| Parameter | Value |
|---|---|
| Operating Vibration | 0.27 G RMS (5 Hz to 500 Hz) |
| Non-operating Vibration | 2.28 G RMS (5 Hz to 500 Hz) |
| Non-operating Shock | 294 m/s² (30 G), half-sine, 11 ms duration |
| Cooling Clearance (Sides) | 15.2 cm (6 in.) |
| Cooling Clearance (Rear) | 7.6 cm (3 in.) |
Technology
Modular Data Timing Generation
Applications
High-speed digital design validation, timing margin analysis, and semiconductor test