The Anritsu MP1800A Signal Quality Analyzer is a highly expandable, plug-in, modular bit error rate tester (BERT) platform designed for signal integrity analysis. It supports multi-channel bit error rate (BER) testing from 0.1 Gbit/s up to 32.1 Gbit/s (and up to 64.2 Gbit/s with external MUX/DEMUX), making it ideal for characterizing optical transceivers (AOC, CFP, CXP, QSFP+), backplanes, and high-speed chips.

Specifications

General

ParameterValue
InterfacesLAN (10/100/1000 Base-T), GPIB, USB 2.0 (Host & Device), VGA, Reference Clock I/O
Display12.1-inch SVGA color TFT LCD with touch screen (800 x 600 resolution)
Warm-up Time30 minutes
CoolingForced air by cooling fan
Module Hot-swappingNot supported

Physical

ParameterValue
Power Supply100 V AC to 120 V AC / 200 V AC to 240 V AC, 47.5 Hz to 63 Hz, ≤ 650 VA
Operating Temperature5 to 40
Dimensions (W×H×D)426 x 221.5 x 451
Weight15

Mainframe & System Architecture

ParameterValue
Chassis Slot Capacity6 slots for plug-in modules
Operating Bit Rate Range (Standard)0.1 Gbit/s to 32.1 Gbit/s
Operating Bit Rate Range (with External MUX/DEMUX)Up to 64.2 Gbit/s
Multi-channel SynchronizationUp to 8 channels at 32 Gbit/s within a single mainframe
Maximum Scaled ConfigurationUp to 32 channels (32G x 32ch) utilizing multi-mainframe control

Pulse Pattern Generator (PPG) Module Specs

ParameterValue
PPG Channels per Module1ch, 2ch, or 4ch options
PPG Maximum Output AmplitudeUp to 3.5 Vp-p (supports EA/EML modulator evaluation)
PPG Output Rise/Fall Time12 ps (typical, 20% to 80%)
PPG Intrinsic Jitter8 ps p-p (typical)
PPG De-emphasis Integration4-tap emphasis up to 32.1 Gbit/s (with external MP1825B)

Error Detector (ED) Module Specs

ParameterValue
ED Channels per Module1ch, 2ch, or 4ch options
ED Minimum Input Sensitivity10 mV (typical)
ED Clock RecoveryEmbedded clock recovery supported
ED Equalizer IntegrationPassive Linear Equalizers supported for improved eye opening

Jitter & Noise Tolerance Testing

ParameterValue
Jitter Modulation TypesSJ (Sinusoidal Jitter), RJ (Random Jitter), BUJ (Bounded Uncorrelated Jitter), SSC (Spread Spectrum Clock), Dual-Tone SJ, HPJ (Half Period Jitter)
Sinusoidal Jitter (SJ) Maximum AmplitudeUp to 2000 UI at low frequency
Sinusoidal Jitter (SJ) High Frequency RangeUp to 1 UI at 250 MHz

Pattern & Sequence Generator Capabilities

ParameterValue
PAM Pattern Support32.1 Gbaud PAM4 generation and accurate PAM4 BER measurement
Burst Pattern GenerationAutomated generation of burst data and auxiliary signal timings (E-PON, G-PON, 10GE-PON)

Software & Measurement Analysis

ParameterValue
Signal Analysis ModesBathtub Measurement (TJ, DJ, RJ), Eye Diagram, Eye Margin, and Burst Measurement
Application Testing SupportCrosstalk evaluation, skew tolerance, and EDFA loop circuit testing

Environmental

ParameterValue
Storage Temperature Range-20 °C to +60 °C
Operating Humidity Range35% to 85% RH (non-condensing)
Acoustic Noise≤ 60 dBA

Reference Clock

ParameterValue
Reference Clock Input Frequency10 MHz
Reference Clock Input Level0.5 Vp-p to 2.0 Vp-p
Reference Clock Output Frequency10 MHz
Reference Clock Output Level≥ 1.0 Vp-p (into 50 Ω)

System & Software

ParameterValue
Operating SystemWindows XP Professional / Windows 7 (configuration dependent)

Pattern Generation (PPG)

ParameterValue
PPG PRBS Pattern Lengths2^7-1, 2^9-1, 2^11-1, 2^15-1, 2^20-1, 2^23-1, 2^31-1

Error Detection (ED)

ParameterValue
ED PRBS Pattern Lengths2^7-1, 2^9-1, 2^11-1, 2^15-1, 2^20-1, 2^23-1, 2^31-1

Clock Synthesizer

ParameterValue
Synthesizer Frequency Resolution1 kHz (with internal synthesizer module)

Connectivity & Control

ParameterValue
Remote Control Command LanguageSCPI

Compliance

ParameterValue
Safety Standard ComplianceEN 61010-1
EMC Standard ComplianceEN 61326-1, EN 55011

Technology

Bit Error Rate Testing (BERT)

Applications

Signal Integrity Analysis, Transceiver Testing (100G/400G), Jitter Tolerance Testing