The Keysight (Agilent) 16823A is a portable logic analyzer featuring 102 logic analysis channels and an integrated 48-channel pattern generator. Part of the 16800 Series, this instrument provides high-performance logic state and timing analysis alongside digital stimulus generation in a single portable form factor, designed for debugging, verifying, and optimizing digital systems.
Specifications
General
| Parameter | Value |
|---|---|
| Interfaces | LAN (10/100/1000 Mb/s), 6 x USB 2.0 (2 front, 4 rear), VGA video out, External Trigger BNC, GPIB (optional) |
| Display | 15-inch color TFT LCD, 1024 x 768 XGA resolution, optional touchscreen |
Physical
| Parameter | Value |
|---|---|
| Power Supply | 100 - 240 V AC (±10%), 50/60 Hz, 550 W maximum power consumption |
| Operating Temperature | 0 °C to 40 °C |
| Dimensions (W×H×D) | 426.5 mm × 337.8 mm × 396.2 mm |
Logic Analyzer Channels & Mode
| Parameter | Value |
|---|---|
| Logic Analyzer Channels | 102 channels |
| Probe Support | Agilent 40-pin logic analyzer probes |
State Analysis
| Parameter | Value |
|---|---|
| Maximum State Clock Speed | 250 MHz (standard) / 450 MHz (Option 450) |
| Maximum State Data Rate | 250 Mb/s (standard) / 500 Mb/s (Option 500) |
| Minimum State Pulse Width | 1.5 ns |
| Setup and Hold Time Window | 1.0 ns (standard) / 600 ps (with Option 450/500) |
| State Memory Depth Options | 1 M (Option 001), 4 M (Option 004), 8 M (Option 008), 16 M (Option 016), 32 M (Option 032) |
Timing Analysis
| Parameter | Value |
|---|---|
| Maximum Timing Sample Rate | 1.0 GHz (half-channel) / 500 MHz (full-channel) |
| Half-Channel Timing Sample Rate | 1.0 GHz |
| Full-Channel Timing Sample Rate | 500 MHz |
| Transitional Timing Sample Rate | 500 MHz |
| Timing Zoom Sample Rate | 4.0 GHz (250 ps resolution) |
| Timing Zoom Memory Depth | 64 K samples |
| Timing Memory Depth Options | Up to 32 M (full-channel) / 64 M (half-channel), configuration dependent |
Input & Probing
| Parameter | Value |
|---|---|
| Threshold Range | -3.0 V to +5.0 V |
| Threshold Settings Resolution | 10 mV |
| Threshold Accuracy | ±(30 mV + 1% of setting) |
| Minimum Input Voltage Swing | 300 mV peak-to-peak |
| Maximum Input Voltage | ±40 V |
| Input Impedance | 100 kΩ (single-ended, probe dependent) / 20 kΩ (differential, probe dependent) |
| Input Capacitance | 1.5 pF (probe dependent) |
Pattern Generator
| Parameter | Value |
|---|---|
| Pattern Generator Channels | 48 channels |
| Maximum Vector Speed | 300 MHz |
| Memory Depth per Channel | 16 M vectors (16,777,216 vectors) |
| Logic Level Outputs | TTL, CMOS, LVCMOS (3.3V, 2.5V, 1.8V, 1.5V), LVDS, ECL (pod dependent) |
| Output Impedance | 50 Ω nominal |
| Pattern Sequencer Commands | Store, loop, repeat, call, branch, etc. |
| Pattern Generator Clock Outputs | 1 |
| Pattern Generator Strobe Outputs | 1 |
| Pattern Generator Lead Sets Compatibility | 10483A, 10480A, 10481A, 10482A, 10484A, 10485A, 10486A, 10344A |
Triggering & Analysis
| Parameter | Value |
|---|---|
| Trigger Sequencer States | 16 states |
| Patterns / Words per State | 16 pattern recognizers |
| Range Recognizers | 4 range recognizers |
| Edge / Glitch Triggers | Edge/glitch triggers on any channel |
| Timer / Counter Resources | 2 timers, 2 counters |
| Global Markers / Search Criteria | 1007 user-definable global markers with search criteria |
Built-in System
| Parameter | Value |
|---|---|
| Operating System | Windows XP Professional or Windows Embedded Standard 7 |
| Processor Type | Intel Celeron 2.0 GHz |
| System Memory (RAM) | 1 GB / 2 GB (configuration dependent) |
| Internal Storage Type & Capacity | 80 GB (or larger) Hard Disk Drive |
| Optical Storage Drive | DVD-ROM |
| Display Size & Resolution | 15-inch color TFT, 1024 x 768 XGA |
| Touchscreen Availability | Optional (Option TCN) |
| External Video Outputs | 1 VGA port |
Connectivity & I/O
| Parameter | Value |
|---|---|
| LAN Interface Speed | 10/100/1000 Mb/s (Gigabit Ethernet) |
| USB Ports | 6 x USB 2.0 (2 front, 4 rear) |
| GP-IB Interface Option | Optional (via USB-to-GPIB adapter) |
| External Trigger Input BNC | 1 BNC (Logic Analyzer Trigger In) |
| External Trigger Output BNC | 1 BNC (Logic Analyzer Trigger Out) |
Software & Protocol Decoding
| Parameter | Value |
|---|---|
| Analysis Software Application | Keysight (Agilent) Logic Analyzer Application Software |
| Offline Analysis Capability | Supported (via free Logic Analyzer software on host PC) |
| Exportable Data Formats | ASCII, CSV, XML, Binary, ALY |
Power & Mechanical
| Parameter | Value |
|---|---|
| AC Input Voltage Range | 100 - 240 V AC ±10% |
| AC Line Frequency Range | 50/60 Hz |
| Power Consumption (Maximum) | 550 W |
Environmental & Compliance
| Parameter | Value |
|---|---|
| Storage Temperature Range | -40 °C to +75 °C |
| Operating Humidity Range | Up to 80% relative humidity (non-condensing) at 40 °C |
| Maximum Operating Altitude | 3,000 meters (10,000 feet) |
| Calibration Interval | 2 years |
Triggering
| Parameter | Value |
|---|---|
| Pre-defined Trigger Macros | 13 |
Compliance & Safety
| Parameter | Value |
|---|---|
| Safety Standards | IEC 61010-1:2001, CAN/CSA-C22.2 No. 61010-1-04, UL 61010-1:2004 |
| EMC Standards | IEC 61326-1:2005, EN 61326-1:2006, ICES/NMB-001:2006 |
Environmental
| Parameter | Value |
|---|---|
| Acoustic Noise Emission | 51.5 dBA (low fan speed), 55.4 dBA (high fan speed) |
| Operating Vibration | 0.27 g rms (5 Hz to 500 Hz) |
| Non-operating Vibration | 2.41 g rms (5 Hz to 500 Hz) |
| Non-operating Altitude | 15,300 m (50,000 ft) |
Logic Analyzer Channels & Inputs
| Parameter | Value |
|---|---|
| Number of Pods | 6 |
Connectivity & Interfaces
| Parameter | Value |
|---|---|
| Target Control Port | 10-pin header (2 rows of 5 pins) |
Pattern Generator Clock & Timing
| Parameter | Value |
|---|---|
| Pattern Generator Clock Input Connector | SMB |
| Pattern Generator Clock Output Connector | SMB |
| Pattern Generator Strobe Output Connector | SMB |
Logic Analyzer Performance
| Parameter | Value |
|---|---|
| Minimum State Eye Width | 1.5 ns |
| Typical Timing Accuracy | ±(250 ps + 0.01% of interval) |
Technology
Logic Analysis and Pattern Generation
Applications
Digital System Debugging, FPGA Verification, Embedded Systems Testing